time interleaving

The key factors on the time interleaving design are interleaving speed, circuit area and memory unit. The paper adopts one port SRAM to implement the design in order to use less memory and the optimization design methods to improve the circuit area.

时间解交织器的交织速度、电路面积、占用内存、是设计中主要因素，文中采用了单口SRAM实现，减少了对存储器的使用，利用IC设计的优化设计方法来改善电路的面积。

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After reviewing the different techniques of RBS mitigation we proposed a novel idea of Phase remodulation based on Time Interleaving between downstream and upstream signals to mitigate RBS noise.

基于上行和下行信号之间的时序交错，我们提出了一种相位二次调制方法以消除瑞利后向散射噪声。

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Improvement of DAB Time Interleaving

DAB传输中时间交织的改进

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Since RS encoding and byte interleaving are working at the same time, the byte interleaving is implemented using SRAM in this paper, and finally the entire CMMB channel coding is implemented and tested in FPGA.

由于CMMB中的RS编码是和字节交织同时进行的，本论文还用片外SRAM实现了字节交织，最后在FPGA中实现了CMMB中的整个信道编码，并进行测试。

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OFDM as well as multi-channel-coding and multi-modulation is adopted by DRM. This combine with interleaving and error protection to decrease the effect of frequency selective fading, multi-path time delay and Doppler effect. Then the robustness of the signal transmitted is enhanced.

DRM采用OFDM调制方式和多级信道编码，使用交织、差错保护技术，大大地减轻了频率选择性衰落、多径时延以及多普勒效应的影响，提高了信号传输质量和稳定性。

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But if time interleaving and bit leaving are combined after channel coding, the performance can be improved.

但是，如果在编码后比特交织，然后做时域交织是可以提高系统性能的。

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